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1 subsumption architecture processor
Автоматика: процессор с классификационными возможностями (напр. в системе искусственного интеллекта)Универсальный англо-русский словарь > subsumption architecture processor
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2 subsumption architecture processor
процессор с классификационными возможностями (напр. в системе искусственного интеллекта)English-Russian dictionary of mechanical engineering and automation > subsumption architecture processor
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3 processor
1) обрабатывающая машина (напр. станок)2) процессор; микропроцессор3) микроЭВМ•- channel control processor
- CL exchange processor
- command generating processor
- communication processor
- communications processor
- computer access processor
- console command processor
- data communication processor
- database processor
- dedicated word processor
- distributed processor
- front-end processor
- gaging processor
- head-of-line central processor
- host processor
- industrial processor
- input-output processor
- job allocation processor
- language processor
- LSI-processor
- master processor
- math processor
- mathematical processor
- measurement processor
- microblock part processor
- model processor
- NC data dividing processor
- neighborhood processor
- numerical processor
- output processor
- PC processor
- pipeline processor
- receiving processor
- RISC processor
- sending processor
- statistical industrial processor
- subsumption architecture processor
- video processor
- vision processor
- voice information processor
- word processorEnglish-Russian dictionary of mechanical engineering and automation > processor
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4 процессор с классификационными возможностями
Универсальный русско-английский словарь > процессор с классификационными возможностями
См. также в других словарях:
Cognitive architecture — A cognitive architecture is a blueprint for intelligent agents. It proposes (artificial) computational processes that act like certain cognitive systems, most often, like a person, or acts intelligent under some definition. Cognitive… … Wikipedia
Register allocation — In compiler optimization, register allocation is the process of multiplexing a large number of target program variables onto a small number of CPU registers. The goal is to keep as many operands as possible in registers to maximise the execution… … Wikipedia
